In many very large scale integration (VLSI) semiconductor devices, polycrystalline silicon (polysilicon) gates are formed over a gate dielectric layer. Due to the relatively high resistance values of the polysilicon layer, a tungsten silicide layer is often formed to lower resistance along the polysilicon gate. Generally, the ratio of silicon to tungsten is approximately 2.6 to 1 within the tungsten silicide layer. To improve adhesion between the tungsten silicide layer and the polysilicon layer, the tungsten silicide layer can be silicon-rich and has a relatively uniform composition as deposited. However, an amorphous silicon layer is usually formed after the tungsten suicide layer and before a silicon nitride antireflective coating (ARC) to promote adhesion between the silicon nitride ARC and the tungsten silicide layer.
Currently, at least four layers are used to form a gate electrode stack including a doped polysilicon layer, a tungsten suicide layer, an amorphous silicon layer, and a silicon nitride ARC. The four layers require numerous processing steps to overcome problems associated with the lack of adhesion between the tungsten silicide layer and each of the polysilicon layer and the silicon nitride ARC.
Further, fluorine from the tungsten hexafluoride, which is used in forming the tungsten silicide, can cause thickening of the gate dielectric layer or a change in the dielectric constant of the gate dielectric layer. Control of these attributes is important to achieve a repeatable and predictable operation of the semiconductor device.
A need exists to form a metal-semiconductor layer using as little as one processing step to form a gate electrode. A need also exists to form the metal-semiconductor layer without causing thickening of the gate dielectric layer. Still another need exists to form the metal-semiconductor layer that has good adhesion to the gate dielectric layer. A need further exists to form the metal-semiconductor layer without having to develop complex processing steps or using unusual materials within a semiconductor fab.